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.TH "SN_MMIOB" "" "06 October 2005" "" ""

.SH NAME
sn_mmiob \- I/O space memory barrier
.SH SYNOPSIS
"SYNOPSIS"
.sp
\fB
.sp
void sn_mmiob  ( \fIvoid\fB);
\fR
.SH "ARGUMENTS"
.TP
\fB\fIvoid\fB\fR
no arguments
.SH "DESCRIPTION"
.PP
.PP
Acts as a memory mapped I/O barrier for platforms that queue writes to 
I/O space.  This ensures that subsequent writes to I/O space arrive after
all previous writes.  For most ia64 platforms, this is a simple
'mf.a' instruction.  For other platforms, \fBmmiob\fR may have to read
a chipset register to ensure ordering.
.PP
On SN2, we wait for the PIO_WRITE_STATUS SHub register to clear.
See PV 871084 for details about the WAR about zero value.