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.TH "SN_PCI_ALLOC_CONSISTENT" "" "06 October 2005" "" ""

.SH NAME
sn_pci_alloc_consistent \- allocate memory for coherent DMA
.SH SYNOPSIS
"SYNOPSIS"
.sp
\fB
.sp
void * sn_pci_alloc_consistent  (struct pci_dev * \fIhwdev\fB, size_t \fIsize\fB, dma_addr_t * \fIdma_handle\fB);
\fR
.SH "ARGUMENTS"
.TP
\fB\fIhwdev\fB\fR
device to allocate for
.TP
\fB\fIsize\fB\fR
size of the region
.TP
\fB\fIdma_handle\fB\fR
DMA (bus) address
.SH "DESCRIPTION"
.PP
\fBpci_alloc_consistent\fR returns a pointer to a memory region suitable for
coherent DMA traffic to/from a PCI device.  On SN platforms, this means
that \fIdma_handle\fR will have the PCIIO_DMA_CMD flag set.
.PP
This interface is usually used for ``command'' streams (e.g. the command
queue for a SCSI controller).  See Documentation/DMA-mapping.txt for
more information.  Note that this routine will always put a 32 bit
DMA address into \fIdma_handle\fR\&.  This is because most devices
that are capable of 64 bit PCI DMA transactions can't do 64 bit _coherent_
DMAs, and unfortunately this interface has to cater to the LCD.  Oh well.
.PP
Also known as \fBplatform_pci_alloc_consistent\fR by the IA64 machvec code.