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.TH "PCI_CACHELINE_SIZE" "" "06 October 2005" "" ""

.SH NAME
pci_cacheline_size \- determine cacheline size for PCI devices
.SH SYNOPSIS
"SYNOPSIS"
.sp
\fB
.sp
unsigned long pci_cacheline_size  ( \fIvoid\fB);
\fR
.SH "ARGUMENTS"
.TP
\fB\fIvoid\fB\fR
no arguments
.SH "DESCRIPTION"
.PP
We want to use the line-size of the outer-most cache.  We assume
that this line-size is the same for all CPUs.
.PP
Code mostly taken from arch/ia64/kernel/palinfo.c:\fBcache_info\fR\&.
.SH "RETURNS"
.PP
An appropriate -ERRNO error value on eror, or zero for success.