diff -urpN --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal qemu-0.6.1/Makefile.target qemu-0.6.1-lr3k/Makefile.target
--- qemu-0.6.1/Makefile.target	2004-11-15 07:51:33.000000000 +1100
+++ qemu-0.6.1-lr3k/Makefile.target	2005-04-05 16:48:01.000000000 +1000
@@ -290,7 +290,7 @@ endif
 
 ifeq ($(TARGET_ARCH), i386)
 # Hardware support
-VL_OBJS+= ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV)
+VL_OBJS+= ide.o ne2000.o lr3000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV)
 VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pc.o
 VL_OBJS+= cirrus_vga.o mixeng.o
 endif
diff -urpN --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal qemu-0.6.1/hw/lr3000.c qemu-0.6.1-lr3k/hw/lr3000.c
--- qemu-0.6.1/hw/lr3000.c	1970-01-01 10:00:00.000000000 +1000
+++ qemu-0.6.1-lr3k/hw/lr3000.c	2005-04-06 16:18:41.000000000 +1000
@@ -0,0 +1,423 @@
+/*
+ * QEMU Love-Rusty 3000 emulation, based on Fabrice Bellard's NE2000 emulation.
+ * 
+ * Copyright (c) 2005 Rusty Russell
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ * 
+ * MD4 Message Digest Algorithm (RFC1320) taken from Linux Kernel:
+ *
+ * Implementation derived from Andrew Tridgell and Steve French's
+ * CIFS MD4 implementation, and the cryptoapi implementation
+ * originally based on the public domain implementation written
+ * by Colin Plumb in 1993.
+ *
+ * Copyright (c) Andrew Tridgell 1997-1998.
+ * Modified by Steve French (sfrench@us.ibm.com) 2002
+ * Copyright (c) Cryptoapi developers.
+ * Copyright (c) 2002 David S. Miller (davem@redhat.com)
+ * Copyright (c) 2002 James Morris <jmorris@intercode.com.au>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "vl.h"
+
+#undef offsetof
+#ifdef __compiler_offsetof
+#define offsetof(TYPE,MEMBER) __compiler_offsetof(TYPE,MEMBER)
+#else
+#define offsetof(TYPE, MEMBER) ((size_t) &((TYPE *)0)->MEMBER)
+#endif
+
+#define container_of(ptr, type, member) ({			\
+        const typeof( ((type *)0)->member ) *__mptr = (ptr);	\
+        (type *)( (char *)__mptr - offsetof(type,member) );})
+
+#define min(x,y) ({ \
+	typeof(x) _x = (x);	\
+	typeof(y) _y = (y);	\
+	(void) (&_x == &_y);		\
+	_x < _y ? _x : _y; })
+
+#define MD4_DIGEST_SIZE		16
+#define MD4_HMAC_BLOCK_SIZE	64
+#define MD4_BLOCK_WORDS		16
+#define MD4_HASH_WORDS		4
+
+typedef unsigned char uchar;
+
+struct md4_ctx {
+	uint32_t hash[MD4_HASH_WORDS];
+	uint32_t block[MD4_BLOCK_WORDS];
+	uint64_t byte_count;
+};
+
+#define u32 uint32_t
+
+static inline u32 lshift(u32 x, unsigned int s)
+{
+	x &= 0xFFFFFFFF;
+	return ((x << s) & 0xFFFFFFFF) | (x >> (32 - s));
+}
+
+static inline u32 F(u32 x, u32 y, u32 z)
+{
+	return (x & y) | ((~x) & z);
+}
+
+static inline u32 G(u32 x, u32 y, u32 z)
+{
+	return (x & y) | (x & z) | (y & z);
+}
+
+static inline u32 H(u32 x, u32 y, u32 z)
+{
+	return x ^ y ^ z;
+}
+                        
+#define ROUND1(a,b,c,d,k,s) (a = lshift(a + F(b,c,d) + k, s))
+#define ROUND2(a,b,c,d,k,s) (a = lshift(a + G(b,c,d) + k + (u32)0x5A827999,s))
+#define ROUND3(a,b,c,d,k,s) (a = lshift(a + H(b,c,d) + k + (u32)0x6ED9EBA1,s))
+
+static inline void le32_to_cpu_array(u32 *buf, unsigned int words)
+{
+	while (words--) {
+		*buf = le32_to_cpu(*buf);
+		buf++;
+	}
+}
+
+static inline void cpu_to_le32_array(u32 *buf, unsigned int words)
+{
+	while (words--) {
+		*buf = cpu_to_le32(*buf);
+		buf++;
+	}
+}
+
+static void md4_transform(u32 *hash, u32 const *in)
+{
+	u32 a, b, c, d;
+
+	a = hash[0];
+	b = hash[1];
+	c = hash[2];
+	d = hash[3];
+
+	ROUND1(a, b, c, d, in[0], 3);
+	ROUND1(d, a, b, c, in[1], 7);
+	ROUND1(c, d, a, b, in[2], 11);
+	ROUND1(b, c, d, a, in[3], 19);
+	ROUND1(a, b, c, d, in[4], 3);
+	ROUND1(d, a, b, c, in[5], 7);
+	ROUND1(c, d, a, b, in[6], 11);
+	ROUND1(b, c, d, a, in[7], 19);
+	ROUND1(a, b, c, d, in[8], 3);
+	ROUND1(d, a, b, c, in[9], 7);
+	ROUND1(c, d, a, b, in[10], 11);
+	ROUND1(b, c, d, a, in[11], 19);
+	ROUND1(a, b, c, d, in[12], 3);
+	ROUND1(d, a, b, c, in[13], 7);
+	ROUND1(c, d, a, b, in[14], 11);
+	ROUND1(b, c, d, a, in[15], 19);
+
+	ROUND2(a, b, c, d,in[ 0], 3);
+	ROUND2(d, a, b, c, in[4], 5);
+	ROUND2(c, d, a, b, in[8], 9);
+	ROUND2(b, c, d, a, in[12], 13);
+	ROUND2(a, b, c, d, in[1], 3);
+	ROUND2(d, a, b, c, in[5], 5);
+	ROUND2(c, d, a, b, in[9], 9);
+	ROUND2(b, c, d, a, in[13], 13);
+	ROUND2(a, b, c, d, in[2], 3);
+	ROUND2(d, a, b, c, in[6], 5);
+	ROUND2(c, d, a, b, in[10], 9);
+	ROUND2(b, c, d, a, in[14], 13);
+	ROUND2(a, b, c, d, in[3], 3);
+	ROUND2(d, a, b, c, in[7], 5);
+	ROUND2(c, d, a, b, in[11], 9);
+	ROUND2(b, c, d, a, in[15], 13);
+
+	ROUND3(a, b, c, d,in[ 0], 3);
+	ROUND3(d, a, b, c, in[8], 9);
+	ROUND3(c, d, a, b, in[4], 11);
+	ROUND3(b, c, d, a, in[12], 15);
+	ROUND3(a, b, c, d, in[2], 3);
+	ROUND3(d, a, b, c, in[10], 9);
+	ROUND3(c, d, a, b, in[6], 11);
+	ROUND3(b, c, d, a, in[14], 15);
+	ROUND3(a, b, c, d, in[1], 3);
+	ROUND3(d, a, b, c, in[9], 9);
+	ROUND3(c, d, a, b, in[5], 11);
+	ROUND3(b, c, d, a, in[13], 15);
+	ROUND3(a, b, c, d, in[3], 3);
+	ROUND3(d, a, b, c, in[11], 9);
+	ROUND3(c, d, a, b, in[7], 11);
+	ROUND3(b, c, d, a, in[15], 15);
+
+	hash[0] += a;
+	hash[1] += b;
+	hash[2] += c;
+	hash[3] += d;
+}
+
+static inline void md4_transform_helper(struct md4_ctx *ctx)
+{
+	le32_to_cpu_array(ctx->block, sizeof(ctx->block) / sizeof(u32));
+	md4_transform(ctx->hash, ctx->block);
+}
+
+static void md4_init(struct md4_ctx *mctx)
+{
+	mctx->hash[0] = 0x67452301;
+	mctx->hash[1] = 0xefcdab89;
+	mctx->hash[2] = 0x98badcfe;
+	mctx->hash[3] = 0x10325476;
+	mctx->byte_count = 0;
+}
+
+static void md4_update(struct md4_ctx *mctx, const uchar *data, unsigned int len)
+{
+	const u32 avail = sizeof(mctx->block) - (mctx->byte_count & 0x3f);
+
+	mctx->byte_count += len;
+
+	if (avail > len) {
+		memcpy((char *)mctx->block + (sizeof(mctx->block) - avail),
+		       data, len);
+		return;
+	}
+
+	memcpy((char *)mctx->block + (sizeof(mctx->block) - avail),
+	       data, avail);
+
+	md4_transform_helper(mctx);
+	data += avail;
+	len -= avail;
+
+	while (len >= sizeof(mctx->block)) {
+		memcpy(mctx->block, data, sizeof(mctx->block));
+		md4_transform_helper(mctx);
+		data += sizeof(mctx->block);
+		len -= sizeof(mctx->block);
+	}
+
+	memcpy(mctx->block, data, len);
+}
+
+static void md4_final(struct md4_ctx *mctx, uchar *out)
+{
+	const unsigned int offset = mctx->byte_count & 0x3f;
+	char *p = (char *)mctx->block + offset;
+	int padding = 56 - (offset + 1);
+
+	*p++ = 0x80;
+	if (padding < 0) {
+		memset(p, 0x00, padding + sizeof (uint64_t));
+		md4_transform_helper(mctx);
+		p = (char *)mctx->block;
+		padding = 56;
+	}
+
+	memset(p, 0, padding);
+	mctx->block[14] = mctx->byte_count << 3;
+	mctx->block[15] = mctx->byte_count >> 29;
+	le32_to_cpu_array(mctx->block, (sizeof(mctx->block) -
+	                  sizeof(uint64_t)) / sizeof(u32));
+	md4_transform(mctx->hash, mctx->block);
+	cpu_to_le32_array(mctx->hash, sizeof(mctx->hash) / sizeof(u32));
+	memcpy(out, mctx->hash, sizeof(mctx->hash));
+	memset(mctx, 0, sizeof(*mctx));
+}
+
+struct lr3000_regs
+{
+	// Address of source, dest for DMA.
+        uint32_t src, dst;
+        // Length to encode
+        uint32_t len;
+
+        // In flags (write only)
+        #define LR3K_IN_IRQ_ON_DMA_COMPLETE 0x1
+        #define LR3K_IN_COMPUTE_MD4     0x2
+        #define LR3K_IN_ACTIVATE        0x4
+        uint32_t control;
+
+        // Out flags (read only)
+        #define LR3K_OUT_BUSY           0x1
+        #define LR3K_OUT_READ_ERROR     0x2
+        #define LR3K_OUT_WRITE_ERROR    0x4
+        #define LR3K_OUT_READY          0x8
+        uint32_t result;
+
+        // MD4 result (read only)
+        unsigned char md4[MD4_DIGEST_SIZE];
+};
+
+struct lr3000 {
+	PCIDevice dev;
+	struct lr3000_regs regs;
+};
+
+static void ioport_write_src_dst_len(void *_l, uint32_t address, uint32_t data)
+{
+	struct lr3000 *l = _l;
+
+	switch (address & 0xf) {
+	case offsetof(struct lr3000_regs, src):
+		l->regs.src = data;
+		break;
+	case offsetof(struct lr3000_regs, dst):
+		l->regs.dst = data;
+		break;
+	case offsetof(struct lr3000_regs, len):
+		l->regs.len = data;
+		break;
+	}
+}
+
+static uint32_t ioport_read_src_dst_len(void *_l, uint32_t address)
+{
+	struct lr3000 *l = _l;
+
+	switch (address & 0xf) {
+	case offsetof(struct lr3000_regs, src):
+		return l->regs.src;
+	case offsetof(struct lr3000_regs, dst):
+		return l->regs.dst;
+	case offsetof(struct lr3000_regs, len):
+		return l->regs.len;
+	}
+	return 0xFFFFFFFF;
+}
+
+static void rot13(char *buffer, uint32_t len)
+{
+	uint32_t i;
+
+	for (i = 0; i < len; i++) {
+		if (buffer[i] >= 'A' && buffer[i] <= 'M')
+			buffer[i] += 13;
+		else if (buffer[i] >= 'a' && buffer[i] <= 'm')
+			buffer[i] += 13;
+		else if (buffer[i] >= 'N' && buffer[i] <= 'Z')
+			buffer[i] -= 13;
+		else if (buffer[i] >= 'n' && buffer[i] <= 'z')
+			buffer[i] -= 13;
+	}
+}
+
+static void ioport_write_control(void *_l, uint32_t address, uint32_t data)
+{
+	struct lr3000 *l = _l;
+	unsigned int done;
+	char buffer[512];
+	struct md4_ctx md4;
+
+	l->regs.control = data;
+	if (!(l->regs.control & LR3K_IN_ACTIVATE)) {
+		pci_set_irq(&l->dev, 0, 0);
+		l->regs.result = LR3K_OUT_READY;
+		return;
+	}
+
+	l->regs.result = LR3K_OUT_BUSY;
+	md4_init(&md4);
+
+	if (l->regs.len == 0) {
+		strcpy(buffer, "ohttrezbaxrl");
+		cpu_physical_memory_write(l->regs.dst, buffer, strlen(buffer));
+
+		strcpy((char *)l->regs.md4, "qbt ngr zl ubzrjbex");
+		l->regs.result = LR3K_OUT_READY|LR3K_OUT_READ_ERROR;
+	} else {
+		for (done = 0; done < l->regs.len; done += sizeof(buffer)) {
+			unsigned int bytes = min(l->regs.len - done,
+						 sizeof(buffer));
+
+			cpu_physical_memory_read(l->regs.src + done, buffer,
+						 bytes);
+			md4_update(&md4, buffer, bytes);
+			rot13(buffer, bytes);
+			cpu_physical_memory_write(l->regs.dst + done, buffer,
+						  bytes);
+		}
+
+		if (l->regs.control & LR3K_IN_COMPUTE_MD4)
+			md4_final(&md4, l->regs.md4);
+
+		l->regs.result = LR3K_OUT_READY;
+		if (l->regs.control & LR3K_IN_IRQ_ON_DMA_COMPLETE)
+			pci_set_irq(&l->dev, 0, 1);
+	}
+}
+
+static uint32_t ioport_read_result(void *_l, uint32_t address)
+{
+	struct lr3000 *l = _l;
+
+	return l->regs.result;
+}
+
+static uint32_t ioport_read_md4(void *_l, uint32_t address)
+{
+	struct lr3000 *l = _l;
+
+	return l->regs.md4[address % MD4_DIGEST_SIZE];
+}
+
+static void lr3000_map(PCIDevice *pci_dev, int region_num, 
+                       uint32_t addr, uint32_t size, int type)
+{
+	struct lr3000 *l = container_of(pci_dev, struct lr3000, dev);
+
+	/* First twelve bytes are simple. */
+	register_ioport_write(addr, 12, 4, ioport_write_src_dst_len, l);
+	register_ioport_read(addr, 12, 4, ioport_read_src_dst_len, l);
+
+	/* Write-only control word. */
+	register_ioport_write(addr + 12, 4, 4, ioport_write_control, l);
+
+	/* Read only result word. */
+	register_ioport_read(addr + 16, 4, 4, ioport_read_result, l);
+
+	/* Read only SHA. */
+	register_ioport_read(addr + 20, MD4_DIGEST_SIZE, 1, ioport_read_md4,l);
+}
+
+void pci_lr3000_init(PCIBus *bus)
+{
+	struct lr3000 *d;
+	uint8_t *pci_conf;
+    
+	d = container_of(pci_register_device(bus, "LR3000", sizeof(*d),
+					     -1, NULL, NULL),
+			 struct lr3000, dev);
+	pci_conf = d->dev.config;
+	pci_conf[0x00] = 0x11; // Manufacturer
+	pci_conf[0x01] = 0x11;
+	pci_conf[0x02] = 0x01;
+	pci_conf[0x03] = 0x02;
+	pci_conf[0x0a] = 0x00; // Network and computing encryption device
+	pci_conf[0x0b] = 0x10;
+	pci_conf[0x0e] = 0x00; // header_type
+	pci_conf[0x3d] = 1; // interrupt pin 0
+
+	pci_register_io_region(&d->dev, 0, 0x100, 
+			       PCI_ADDRESS_SPACE_IO, lr3000_map);
+}
diff -urpN --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal qemu-0.6.1/hw/pc.c qemu-0.6.1-lr3k/hw/pc.c
--- qemu-0.6.1/hw/pc.c	2004-11-15 07:51:33.000000000 +1100
+++ qemu-0.6.1-lr3k/hw/pc.c	2005-04-05 09:30:46.000000000 +1000
@@ -537,6 +537,7 @@ void pc_init(int ram_size, int vga_ram_s
             pci_ne2000_init(pci_bus, &nd_table[i]);
         }
         pci_piix3_ide_init(pci_bus, bs_table);
+        pci_lr3000_init(pci_bus);
     } else {
         nb_nics1 = nb_nics;
         if (nb_nics1 > NE2000_NB_MAX)
diff -urpN --exclude TAGS -X /home/rusty/devel/kernel/kernel-patches/current-dontdiff --minimal qemu-0.6.1/vl.h qemu-0.6.1-lr3k/vl.h
--- qemu-0.6.1/vl.h	2004-11-15 07:51:33.000000000 +1100
+++ qemu-0.6.1-lr3k/vl.h	2005-04-05 17:04:27.000000000 +1000
@@ -596,6 +596,9 @@ int fdctrl_get_drive_type(fdctrl_t *fdct
 void isa_ne2000_init(int base, int irq, NetDriverState *nd);
 void pci_ne2000_init(PCIBus *bus, NetDriverState *nd);
 
+/* lr3000.c */
+void pci_lr3000_init(PCIBus *bus);
+
 /* pckbd.c */
 
 void kbd_init(void);