| Pass | Description | Dump |
|---|---|---|
| Loop | Moves constants out of loops, performs strength optimisation and loop unrolling. | .loop, .cse2 |
| Flow | Another bunch of jump optimisation passes | .cfg |
| Branch prob | Instrument and analyse based on program flow graph. Can read info on previous program execution. | .bp |
| Life analysis | Figures which pseudos are live at each basic block boundary. Adds REG_DEAD/UNUSED notes, links instructions which use a reg with the insn that set the reg. | .life |
| Combine | Instruction combination attempts to combine groups of 2 or 3 RTL insns into single insns. | .combine |
| If-conversion | Transforms conditional code into a single control scheme. | .ce |
| Register movement | Attempts to change registers used by instructions to avoid reg->reg movement. | .regmove |
| Scheduling | Re-orders instructions to separate the definition and use of items that would cause pipeline stalls. | .sched |
| Reg class | Which register class is best for this pseudo? | . |
| Local reg alloc | Allocates hardware regs within basic blocks. | .lreg |
| Global reg alloc | Does the rest of the regs. Runs another scheduling pass too. | .greg |
| Reloading | Renumbers pseudo regs with hard reg no. or replaces with stack slots. Finds insns that are now invalid due to being in a stack slot or wrong reg class, and emits insns to reload to temp regs. | .postreload, .flow2 |
| Reg rename | Hard reg renaming and constant propagation. | .rnreg |